Ansys RedHawk–SC 2022 R1.2 Linux
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Free Download Ansys RedHawk-SC 2022 R1.2 | 3.2 Gb
Owner:Ansys
Product Name:RedHawk-SC
Version:2022 R1.2
Supported Architectures:x86_64
Website Home Page :www.ansys.com
Languages Supported:english
System Requirements:Linux *
Size:3.2 Gb
Ansys has releasedRedHawk-SC 2022 R1.2is a distributed compute, data centric platform for thepurpose of coordinating physical design analyses for integrated circuits and consists of these main components. This release continues improvements to the general functionality, speed, and usability of RedHawk-SC.
RedHawk-SC 2022 R1.2 Release Notes
Software version 2022 R1.2 continues improvements to the general functionality, speed, and usability of RedHawk-SC.
DesignView
- Fixed an issue of renaming the nets (with rename_pg_nets settings) that were shorted internally through different physical hierarchies. Difference in node count and in related downstream views is expected.
- Fixed an issue where the tool generated an error during component maskshift sanity check when there were duplicate LEF cells in the input LEF files.
TimingView
- Fixed an issue of assert due to invalid namemap ID in the timing file. The tool now displays the following error message in such cases:
ERRORNo instance hierarchy exists for namemap id '2' ($file:$line)
SwitchingActivityView
- Improved the performance of switching activity propagation for designs where instances have signal pins that are tied to power and ground nets.
- Fixed an issue of high memory consumption during SwitchingActivityView creation in activity propagation-based flow.
PowerProfileView
- Improved runtime significantly when the instance signal pins were connected to PG nets directly.Difference in results can be expected in the subsequent views.
- Fixed an issue of high memory consumption when PowerProfileView (PPV) stored leaf instance power data. The default value of save_instance_events argument is now set to off.
TechView
- Fixed an issue where empty lines in the lifetime_table_file argument caused parsing error during TechView creation.
ExtractView
- Improved the accuracy of resistance extraction, especially for the metals near the circuit partition boundary. Difference in extracted resistance values is expected.
ElectromigrationView
- Fixed a corner-case issue in electromigration violation calculation due to current transition from rectilinear routing to non-rectilinear routing. Difference in electromigration violations is expected.
- The em_threshold_for_recheck setting is now used to enable the electromigration recheck feature by specifying a threshold value (greater than 0).
- Fixed an issue where the tool assigned incorrect unit of time during peak electromigration current limit calculation with a specific foundry technology file.
- Fixed an issue of electromigration limit calculation for Through Silicon Vias (TSVs). Change in electromigration value is expected.
ValueChangeView
- The RedHawk-SC tool is now compliant with Verdi version 2021.09.No-Propagation Vectorless (NPV) ScenarioView
- The tool now considers signals that always remain in X state as constant LOW or HIGH. Change in total power is expected if there are a lot of always-X nets.
- Fixed a corner-case issue in the switching of macro instances (with active_input setting) due to missing edge triggering output pins. The tool now switches such instances.
- Fixed an issue in NPV event replay flow where the tool did not honor leakage events for dangling output pins. The tool is now expected to report instance events and demand current due to leakage for instances with dangling output pins.
ScenarioView
- Fixed an issue of incorrect clock frequency and clock_instance label in the get_attributes function output for event replay flow.
- Fixed an issue of assert due to missing slew for shadow instance in the timing window file for clock pin during sequential instance simulation. The tool now checks for the slew values of the parent instance before updating the transition time for clock pin events.
- Fixed an issue where the tool honored the states of input pins only to determine state dependent leakage power. The tool now honors the states of all the pins while determining leakage power.
- Fixed an issue when the current was applied to both rise and fall edges even if the characterization was done for the full-cycle and active input was a non-clock type.
- Improved clock pin events handling for sequential instances with VCD which can result in improved power and demand current.
AnalysisView
- Added package_simulation_view support in the FastPresim flow.
Usage:
analysis_view=db.perform_analysis_with_fast_presim (settings= av_settings,options= options,scenario_view= scenario_view,package_simulation_view=pkg_simulation_view,simulation_view= simulation_view)
- Fixed an issue that caused oscillations in power gate currents during rampup analysis.
- Fixed an issue of high runtime in processing disconnected bumps during AnalysisView creation.
- Fixed an issue in decap handling for MMX cells during simulation. Minor differences in simulation results are expected.
- In the previous releases, the tool performed simulation even in the absence of voltage sources. The tool now displays the following error message when there are no voltage sources in the top sub-circuit of the user-specified package netlist. ERROR[av] Simulation is skipped because there are no voltage sources in the top subckt of user specified package netlist.
Multichip Analysis
- Enhanced the tool to report a meaningful error when RMS and peak ElectromigrationViews are created with static AnalysisView. For example:
Traceback (most recent call last):
File "", line 1, in
File "", line 144, in wrapped_f
File "", line 354, in new_f
File "", line 343, in _create_or_skip_view
File "", line 337, in new_func
File "", line 275, in wrapped_f
File "", line 1214, in _create_electromigration_view
File "", line 1275, in check_em_setting
File "", line 1269, in check_analysis_view
RuntimeError: AnalysisView (av_static_3d_mc__basedie) specified is static only. Cannot be used to perform RMS EM checking.
- Fixed an issue where electromigration data was not populated in the Query History window for a selected metal segment.
- Fixed an issue where the emir_reports module did not generate metal and via electromigration reports during multichip analysis.
- Fixed an issue where the tool reported 'global' coordinates for the top chip in GUI instead of 'local' coordinates.
- Fixed an issue of asserts, due to which, zero edge currents were observed in one of the power domains.
- Fixed a hang issue during shortest path resistance (SPR) path query through two passive routing designs.
ThermalView
- RedHawk-SC now accepts user specified delta_t values for instances or cells.
Usage example:
settings_thermal={'calculation':{'thermal_flow':1,'dt_inst':{:0.5},'dt_cell':{:0.4}}} >>> thermal_view_dt_inst_2.get_instance_temperature(Instance(i)) {'self_heating': 0.5, 'temperature_ambient': 125.0, 'temperature': 125.5}
Infrastructure
- Fixed a fatal error when multichip configuration file path was a relative path and workers werelaunched using secure shell (SSH).
Layout/GUI
- Fixed an issue where waveform widget could not Description switch currents.
ExplorerView
- Fixed an issue of Views page having redundant report repetitions in the Explorer.
UserView
- Fixed a crash when UserView was saved in an unknown database (db). Added the new dbargument with the create_user_view command to set the database name where UserView isto be saved.
Built-in Reports
- Improved the accuracy of ouput_load value in the cell failures in time (FIT) file.
- Fixed an issue where the chip identities (Ids) were associated with a single chip, and hence did not support EMIR electromigration via report for a multichip system.
- Fixed an issue in the emir_reports.report_instance_pin_spr()function to report decoupling capacitor and filler cells.
- Fixed an issue of long runtime and inaccurate reporting for SPEF annotation summary when ScenarioView was input. For example:data = data_integrity_reports.get_spef_annotation_summary(spef_view, view=scenario_view, include_uncovered_net_details=True)The tool now reports correct sequential and combinational clock data when view=scenario_view is input.
Ansys RedHawk-SCis the next-generation SoC power-noise and reliability framework to enable advanced design analysis. RedHawk-SC is built on Ansys SeaScape, the world's first purpose-built, big data architecture for multiphysics simulations.
SeaScapeis an EDA-specific distributed and scalable framework for actionable analytics. The RedHawk-SC tool consumes various input data formats and processes the data using the required engines for power integrity signoff. The SeaScape infrastructure includes the SeaScape database, scheduler, Python APIs, and a GUI. You can access these resources by using simple Python scripts and analyze your designs for power integrity. SeaScape framework provides per-core scalability, flexible design data access, instantaneous design bring-up, data analytics and many other revolutionary capabilities. RedHawk-SC is the industry gold-standard for SoC power noise and reliability sign-off. The following figure shows the new features that RedHawk-SC enables over the classic RedHawk tool.
Some key analyses available in RedHawk-SC are as follows:
- Advanced power analytics
- Static and DVD diagnostics
- Chip-Package coanalysis
- Thermal analysis
- 3DIC analysis
- Chip Power Model generation
- Power and Signal Electromigration analysis
- Electrostatic Discharge analysis
Introducing ANSYS RedHawk-SC
ANSYS RedHawk, the industry's gold standard platform for SoC power noise and reliability signoff is offered on the SeaScape platform as RedHawk-SC, thus giving you the best of both worlds - the signoff confidence RedHawk provides and the elastic scalability and big data analytics of ANSYS SeaScape.
Ansysis the global leader in engineering simulation. Through our strategy of Pervasive Engineering Simulation, we help the world's most innovative companies deliver radically better products to their customers. By offering the best and broadest portfolio of engineering simulation software, we help them solve the most complex design challenges and create products limited only by imagination. Founded in 1970, Ansys is headquartered south of Pittsburgh, Pennsylvania, U.S.A.
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